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www.enpirion.com ep5388qi 800ma synchronous buck regulator with integrated inductor 3mm x 3mm x 1.1mm package july 2008 rohs compliant halogen free product overview the ep5388qi is a synchronous buck converter with integrated inductor, pwm controller, mosfets, and compensation providing the smallest po ssible solution size. the ep5388qi requires only two small mlcc capacitors to make a complete solution. integration of the induc tor greatly simplifies design, contains noise, reduces part count, and reduces solution footprint. low output ripple ensures compatibilit y with rf systems. the ep5388qi operates at a switching frequency of 4 mhz, enabling this unprecedented level of integration and small external components. type iii voltage mode control is used to provide high noise immunity and wide control loop bandwidth. the small footprint makes this part ideal for space constrained por table applications. shutdown current of <1ua extends battery life output voltage level is programmed via a 3-pin vid selector providin g seven pre-programmed output voltages along with an option for external resistor divider. applications ? noise sensitive rf applications ? area constrained applications ? wireless data applications ? portable gaming devices ? personal media players ? advanced mobile processors, dsp, io, memory, video, multimedia engines ordering information part number temp rating (c) package ep5388qi-t -40 to +85 16-pin qfn t&r EP5388QI-E ep5388qi evaluation board product highlights featuring integrated inductor technology ? 3mm x 3mm x 1.1 mm qfn package ? only two low cost mlcc caps required ? 4 mhz switching frequency ? high efficiency, up to 94% ? up to 800ma continuous output current ? wide 2.4v to 5.5v input range ? v out range 0.6v to v in ? 0.5v ? 3-pin vid output voltage programming ? 100% duty cycle capable ? less than 1 a standby current ? low v out ripple for rf compatibility ? short circuit and over current protection ? uvlo and thermal protection ? rohs compliant; msl 3 260c reflow typical application circuit v in v sense v in v s1 v s2 v s0 ep5388qi 47uf 1206 4.7 f 0603 v out v out gnd enable v fb voltage select figure 1. typical application circuit.
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 2 www.enpirion.com pin description figure 2. ep5388qi package pin-out. pin name function 1, 15, 16 nc(sw) no connect. these pins are interna lly connected to the common switch node of the internal mosfets. nc(sw) pins are not to be electrically connected to any external signal, ground, or voltage. however, they must be soldered to the pcb. failure to follow this guideline may result in part malfunction or damage. 2,3 pgnd power ground. 4 vfb feed back pin for external divider option. when using the external divider option (vs2=vs1=vs0= high) c onnect this pin to the center of the external divider. se t the divider such that v fb = 0.603v. the ?ground? side of the external di vider should be connected to agnd. 5 vsense sense pin for preset output vo ltages. connect at the output capacitor. 6 agnd analog ground. this is the quiet ground for the internal control circuitry 7,8 vout regulated output voltage. refer to application section for proper layout and decoupling. 9 nc no connect. this pin should not be electrically connected to any external signal, voltage, or ground.. this pin must be soldered to the pcb. 10, 11, 12 vs2,vs1,vs0 output voltage select. vs2=pin10 vs1 =pin11, vs0=pin12. selects one of seven preset output voltages or c hoose external divider by connecting pins to logic high or lo w. (refer to section on output voltage select for more detail). 13 enable output enable. enable = logic high, disable = logic low. 14 vin input voltage pin.
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 3 www.enpirion.com functional block diagram voltage select dac switch vref (+) (-) error amp v sense v fb v out vs0 vs1 vs2 package boundry p-drive n-drive uvlo thermal limit current limit soft start sawtooth generator (+) (-) pwm comp v in enable pgnd logic compensation network nc(sw) agnd figure 3. ep5388qi functional block diagram. absolute maximum ratings caution: absolute maximum ratings are stre ss ratings only. functional operation beyond recommended operating conditions is not implied. stress beyond absolute maximum ratings may cause permanent damage to the device. exposure to absolute maximum rated conditions for extended periods may affect device reliability. parameter symbol min max units input supply voltage v in -0.3 7.0 v voltages on: enable, v sense , v s0 -v s2 -0.3 v in + 0.3 v voltage on: v fb -0.3 2.7 v storage temperature range t stg -65 150 c reflow temp, 10 sec, msl3 jedec j-std-020c 260 c esd rating (based on human body model) 2000 v
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 4 www.enpirion.com recommended operating conditions parameter symbol min max units input voltage range v in 2.4 5.5 v output voltage range v out 0.603 v in ? 0.5 v output current i out 0 800 ma operating ambient temperature t a -40 +85 c operating junction temperature t j -40 +125 c thermal characteristics parameter symbol typ units thermal resistance: junction to ambient (0 lfm)* ja 100 c/w thermal shutdown trip point t j-tp +150 c thermal shutdown trip point hysteresis 15 c * based on a 2 oz. copper board and proper thermal design in line with jedec eij-jesd51 standards. electrical characteristics note: v in = 3.6v, c in = 4.7 f 0603 mlcc, c out = 47uf 1206 mlcc. t a = -40c to +85c unless otherwise noted. typical values are at t a = 25c. parameter symbol test conditions min typ max units under-voltage lockout v uvlo v in going low to high 2.2 2.3 v uvlo hysteresis 0.145 v v out initial accuracy ? v out_initl t a = 25c, 2.4v v in 5.5v -2 +2 % line regulation ? v out_linel 2.4v v in 5.5v 0.06 %/v load regulation ? v out_load 0a i load 800ma 0.0003 %/ma temperature variation ? v out_templ -40c t a +85c 0.008 %/c overall v out accuracy (line, load, and temperature combined) ? v out_all 2.4v v in 5.5v -40c t a +85c 0a i load 800ma -3 +3 % dynamic voltage slew rate ? v slew 1.125 1.5 1.875 v/ms continuous output current i out -20c t a +85c -40c t a +85c 800 750 ma shut-down current i sd enable = low 0.75 a pfet ocp threshold i lim 1000 ma feedback pin voltage v fb 2.4v v in 5.5v -20c t a +85c 0a i load 800ma 0.585 0.603 0.621 v feedback pin input current i fb 10 na vs2-vs0 threshold v sx_th pin = low pin = high 0.0 1.4 0.4 v in v vs2-vs0 pin input current i vsx 1 na enable pin voltage thresholds v en_th pin = low pin = high 0.0 1.4 0.2 v in v enable pin input current i en enable = vin = 3.6v 2 a operating frequency f osc 4 mhz pfet on resistance r ds(on) 340 m ? nfet on resistance r ds(on) 270 m ? dropout resistance r dropout 450 m ?
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 5 www.enpirion.com parameter symbol test conditions min typ max units soft-start operation soft-start slew rate ? v ss 1.125 1.5 1.875 v/ms time to 90% v out t ss vout = 3.3v 2 ms ? parameter guaranteed by design. typical performance characteristics typical performance characteristics are measured us ing the application circuit in figure 1. all measurements made at 25oc. 50 55 60 65 70 75 80 85 90 95 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 0.75 0.80 load current (a) efficiency (%) efficiency , v in = 3.3v, v out = 2.5v,1.8v,1.5v, 1.2v, efficiency , v in = 3.7v, v out = 2.5v,1.8v,1.5v, 1.2v, top to bottom. top to bottom. 50 55 60 65 70 75 80 85 90 95 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 0.75 0.80 load current (a) efficiency (%) efficiency , v in = 5v, v out = 3.3v, 2.5v,1.8v,1.5v, 1.2v, output ripple , v in = 5v, v out = 1.2v; load = 500ma. top to bottom. 50 55 60 65 70 75 80 85 90 95 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 0.75 0.80 load current (a) efficiency (%)
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 6 www.enpirion.com output ripple , v in = 5v, v out = 3.3v; load = 500ma. output ripple , v in = 3.3v, v out = 1.2v; load = 500ma. output ripple , v in = 3.3v, v out = 1.8v; load = 500ma. output ripple , v in = 3.3v, v out = 2.5v; load = 500ma. transient, v in = 5.0v, v out = 1.2v, load = 0-800ma. transient, v in = 5.0v, v out = 3.3v, load = 0-800ma.
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 7 www.enpirion.com transient, v in =3.3v, v out = 1.2v, load = 0-800ma. transient, v in = 3.3v, v out = 1.8v, load = 0-800ma. startup, v in = 3.6v, v out = 1.5v, load = 500ma . shutdown, v in = 3.6v, v out = 1.5v, load = 500ma. enable in light blue; v out in dark blue. enable in light blue; v out in dark blue. detailed description functional overview the ep5388qi is a complete dcdc converter solution requiring only two low cost mlcc capacitors. mosfet switches, pwm controller, gate-drive, compensation, and inductor are integrated into the tiny 3mm x 3mm x 1.1mm package to provide the smallest footprint possible wh ile maintaining high efficiency, low ripple, and high performance. the converter uses voltage mode control to provide the simplest implementation and high noise immunity. the device operates at a 4mhz switching frequen cy. the high switching frequency allows for a wide control loop bandwidth providing ex cellent transient performance. the high switching frequency further enables the use of very small components making possible this unprecedented level of integration. enpirion?s proprietary power mosfet technology provides very low switching loss at frequencies of 4 mhz and higher, allowing for the use of very small internal components, and high performance. int egration of the magnetics virtually eliminates the design/layout issues normally associated wit h switch-mode dcdc converters. all of this enables much easier and faster incorporation into various applications to meet demanding requirements.
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 8 www.enpirion.com output voltage is chosen from seven preset values via a three pi n vid voltage select scheme. an external divider option enables the selection of any voltage in 0.603v to v in -0.5v range. this reduces the number of components that must be qualified and reduces inventory burden. the vid pins can be toggled on the fly to implement glitch free dynamic voltage scaling between any two of the seven preset vid voltage levels. protection features in clude under-voltage lock- out (uvlo), over-current protection (ocp), short circuit protection, and thermal overload protection. integrated inductor enpirion has introduced the world?s first product family featuring integrated inductors. the ep5388qi utilizes a proprietary low loss integrated inductor. t he use of an internal inductor localizes the noises associated with the output loop currents. the inherent shielding and compact construction of the integrated inductor reduces the radiated noise that couples into the traces of the circuit board. further, the package layo ut is optimized to reduce the electrical path length for the ac ripple currents that are a major source of radiated emissions from dcdc converters. the integrated inductor significantly reduces parasitic effects that can harm loop stability, and makes layout very simple. stable over wide range of operating conditions the ep5388qi utilizes an internal type iii compensation network and is designed to provide a high degree of stability over a wide range of operating conditions. the device operates over the entire input and output voltage range with no exte rnal modifications required. the very high switching frequency allows for a very wide control loop bandwidth. soft start internal soft start circuits limit in-rush current when the device starts up from a power down condition or when the ?enable? pin is asserted ?high?. digital control circuitry limits the v out ramp rate to levels that are safe for the power mosfets and the integrated inductor. the soft start ramp rate is nominally 1.5v/ms. over current/short circuit protection when an over current condition occurs, v out is pulled low. this condition is maintained for a period of approximately 1.2 ms and then a normal soft start cycle is initiated. if the over current condition still persists, this cycle will repeat. under voltage lockout during initial power up an under voltage lockout circuit will hold-off the switching circuitry until the in put voltage reaches a sufficient level to insure proper operation. if the voltage drops below the uvlo threshold the lockout circuitry will again disable the switching. hysteresis is included to prevent chattering between states. enable the enable pin provides a means to shut down the converter or enable normal operation. transitioning fr om low to high will cause the converter to go through a soft start cycle. transitioning from high to a low will cause the device to discharge the output and then shutdown. in shutdown mode, the device quiescent current will be less than 1 ua. note: this pin must not be left floating.
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 9 www.enpirion.com thermal shutdown when excessive power is dissipated in the chip, the junction temperature rises. once the junction temperature exceeds the thermal shutdown temperature t he thermal shutdown circuit turns off the conv erter thus allowing the device to cool. when t he junction temperature decreases by 15 c, the device will go through the normal startup process. application information output voltage select to provide the highest degree of flexibility in choosing output voltage, the ep5388qi uses a 3 pin vid, or voltage id , output voltage select arrangement. this allows the designer to choose one of seven preset voltages, or to use an external voltage divider. internally, the output of the vid multiplexer sets the value for the voltage reference dac, which in turn is connected to the non-inverting input of the error amplifier. this a llows the use of a single feedback divider with constant loop gain and optimum compensation, independent of the output voltage selected. table 1 shows the vari ous vs2-vs0 pin logic states and the associ ated output voltage levels. a logic ?1? in dicates a connection to v in or to a ?high? logic voltage level. a logic ?0? indicates a connection to ground or to a ?low? logic voltage level. these pins can be either hardwired to v in or gnd or alternatively can be driven by standard logic levels. logic low is defined as v sx 0.4v. logic high is defined as 1.4v v sx v in . any level between these two values is indeterminate. these pins must not be left floating. external voltage divider as described above, the external voltage divider option is chosen by connecting the vs0, vs1, and vs2 pins to v in or logic high. the ep5388qi uses a separate feedback pin, v fb , when using the exte rnal divider. v sense must be connected to v out as indicated in figure 4. v in v sense v in v s1 v s2 v s0 ep5388qi 47 f 1206 4.7uf 0603 v out v out gnd enable ra rb v fb figure 4. external divider application circuit. the output voltage is nominally selected by the following formula: ( ) rb ra 1 0.603v + = out v then r b is given as: ? ? = 603 . 0 603 . 0 out a b v xr r r a must be chosen as nominally 200k ? to maintain loop gain. v out can be programmed over the range of 0.603v to v in -0.5v. dynamically adjustable output the ep5388qi is designed to allow for dynamic switching between the seven predefined vid voltage levels. the inter- vs2 vs1 vs0 v out 0 0 0 3.3v 0 0 1 2.5v 0 1 0 1.8v 0 1 1 1.5v 1 0 0 1.25v 1 0 1 1.2v 1 1 0 0.8v 1 1 1 user selectable table 2. vid voltage select settings.
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 10 www.enpirion.com voltage slew rate is optimized to prevent excess undershoot or ov ershoot as the output voltage levels transition. the slew rate is identical to the soft-start slew rate of 1.5v/ms. dynamic transitioning between internal vid settings and the external divider is not allowed. input and output capacitors the input capacitance requirement is 4.7uf 0603 mlcc. enpirion recommends that a low esr mlcc capacitor be used. a variety of output capacitor configurations are possible depending on footprint and ripple requirements. for typica l applications, it is recommended to use a single 47uf 1206 mlcc capacitor. ripple performance can be improved by using 2 x 22uf 0805 mlcc capacitors. a single 10uf 0805 mlcc can be used if v out programming is accomplished using an external resistor divide r, with the addition of a 10pf phase lead capacitor as shown in figure 5. note that in this configuration, v sense should not be connected to v out . r a and r b values are calculated as shown in the external voltage divider section. the input and the output capacitor must use a x5r or x7r or equiva lent dielectric formulation. y5v or equivalent dielectric formulations lose capacitance with frequency, bias voltage, and tem perature and are not suitable for switch-mode dc-dc converter output filter applications. contact enpirion applicat ions for information on other output capacitor usage. v in v sense v in v s1 v s2 v s0 ep5388qi 10 f 0805 4.7uf 0603 v out v out gnd enable ra rb v fb 10pf figure 5. applications circuit for c out = 1 x 10uf 0805. layout considerations* *optimized pcb layout file is downloadable from the e npirion website to assure first pass design success. refer to figure 6 for the fo llowing layout recommendations. recommendation 1: the input and output filter capacitor s should be placed as close to the ep5388qi as possible to reduce emi from input an d output loop ac currents. this reduces the physical area of these ac current loops. recommendation 2: the system ground plane should be the first layer immediately below the surface layer (pcb layer 2). if it is not possible to make pcb layer 2 the syst em ground plane, a local ground island should be creat ed on pcb layer 2 under the enpiri on device and including the area under the input and output filter capacitors. th is ground plane, or gr ound island, should be continuous and uninterrupted underneat h the enpirion device and the input and output filter capacitors. recommendation 3 : the surface layer ground pour should incl ude a ?slit? as shown in figure 6 to separate the input and output ac loop currents. this will help reduce noise coupling from the input current loop to the out put current loop.
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 11 www.enpirion.com recommendation 4 : multiple small vias (approximately 0.25mm finished diameter) should be used to connect the ground terminals of the input and output capacitors, and t he surface ground pour under the device, to the system gr ound plane. if a local ground isla nd is used on pcb layer 2, the vias should connect to the ground island and cont inue down to the pcb system ground plane. recommendation 5: the agnd pin should be connected to the system ground plan e using a via as described in recommendation 4. agnd must not be connected to the surface layer ground pour. recommendation 6: as with any switch-mode dc-dc converter, do not run any sensitive signal or control lines under the converter package. vias slit vias slit figure 6 . pcb layout recommendation. recommended pcb footprint
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 12 www.enpirion.com
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 13 www.enpirion.com package dimensions
july 2008 ep5388qi ? enpirion 2008 all rights reserved, e&oe 14 www.enpirion.com contact information enpirion, inc. 685 us route 202/206 suite 305 bridgewater, nj 08807 phone: +1 908-575-7550 fax: +1 908-575-0775 enpirion reserves the right to make changes in circuit design and/or specif ications at any time without notice. information fur nished by enpirion is believed to be accurate and reliable. enpirion assumes no responsib ility for its use or for infringement of patents or other th ird party rights, which may result from its use. enpirion products are not authorized for us e in nuclear control systems, as critical components in life su pport systems or equipment used in hazardous environment without the ex press written authority from enpirion.

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